In recent years, concerning LSIs that are formed on silicon substrates, high performance of the LSIs is achieved by miniaturizing the size of a device used in the LSI, that is, decreasing the gate length based on a so-called scaling rule or decreasing the thickness of a gate insulating film. Currently, a fully-depleted channel MOSFET (FD-type channel MOSFET) is studied and developed to improve cut-off characteristics in a short channel region where the gate length Lg is 30 nm or less.
As one kind of the semiconductor devices, the following various metal-insulator-semiconductor (MIS)-type semiconductor devices having a three-dimensional structure are suggested. Specifically, a double-gate fully-depleted channel MOSFET (FinFET) is suggested in which a protrusion-shaped region is formed by minutely cutting a silicon-on-insulator (SOI) substrate or a bulk silicon substrate in a stripe shape (the protrusion-shaped region is referred to as “fin”), a gate electrode is formed to cross over the protrusion-shaped region three-dimensionally, and the top surface and the sides of the cut protrusion-shaped region are used as a channel.
In order to operate the FinFET as a fully-depleted channel, the width of the fin needs to be decreased to be smaller than the gate length Lg. Therefore, in the FinFET, plural fins that have a narrow width are arranged.